![I need to make a vhdl counter with a 74x169, but after 2 days i am truly stuck. I need to make it from a template (image 1, a 74x163), and image I need to make a vhdl counter with a 74x169, but after 2 days i am truly stuck. I need to make it from a template (image 1, a 74x163), and image](https://preview.redd.it/ctkukjm4xy481.png?width=640&crop=smart&auto=webp&s=d23cb0ab31e4cc204fd04f683ac8c2bfe756727b)
I need to make a vhdl counter with a 74x169, but after 2 days i am truly stuck. I need to make it from a template (image 1, a 74x163), and image
![Does anyone know why this VHDL code is not counting on my FPGA? The 7-segment is stuck on "0". So I am assuming it is not making it to the second count Does anyone know why this VHDL code is not counting on my FPGA? The 7-segment is stuck on "0". So I am assuming it is not making it to the second count](https://preview.redd.it/does-anyone-know-why-this-vhdl-code-is-not-counting-on-my-v0-3uju1j6xm64a1.png?auto=webp&s=9095f5907457c3b788d495474164595aab1403e7)
Does anyone know why this VHDL code is not counting on my FPGA? The 7-segment is stuck on "0". So I am assuming it is not making it to the second count
![L18 – VHDL for other counters and controllers. Other counters More examples Gray Code counter Controlled counters Up down counter Ref: text Unit. - ppt download L18 – VHDL for other counters and controllers. Other counters More examples Gray Code counter Controlled counters Up down counter Ref: text Unit. - ppt download](https://images.slideplayer.com/15/4548800/slides/slide_5.jpg)